Conjunto de Instrucoes do Entendo® Versao 0.51 Atualizado em 28/08/98 Legenda: * reg = registrador (ver tabela) * vl8 = valor de 8 bits (1 byte) * vl16 = valor de 16 bits (2 bytes) * vl24 = valor de 24 bits (3 bytes) * vl = vl8 | vl16 | vl24 (vai depender do outro operando) * ad = endereco de dados / conteudo (3 bytes) * [vl24] = equivale ao anterior Registradores: * [00] AX - uso geral (16 bits) * [01] AY - uso geral (16 bits) * [02] BTN - estado dos botoes (16 bits) * [03] CX - contador (16 bits) * [04] IX - indice (16 bits) * [05] SP - apontador de pilha (16 bits) * [06] [SP] - conteudo da posicao de memoria apontada por SP * [07] DP - apontador de dados (24 bits) * [08] [DP] - conteudo da posicao de memoria apontada por DP * [09] AR - apontador de uso geral (24 bits) * [0A] [AR] - conteudo da posicao de memoria apontada por AR Instrucoes: [00] [01] CLS [02 vl8] MODE vl8 [03] PAINT [04] END [05] SCROLL [06] RET [07 reg] FDI reg [08 vl8] FDI vl8 [09 reg] FDO reg [0A vl8] FDO vl8 [0B reg] PLAY reg [0C vl8] PLAY vl8 [0D] STOP [0E reg] SND reg [0F vl8] SND vl8 [10] STPS [11 reg] LDB reg [12 vl8] LDB vl8 [13 reg] PUT reg [14 vl16] PUT vl16 [15] PUSHF [16] POPF [17 reg] PUSH reg [18 vl16] PUSH vl16 [19 vl24] PUSH vl24 [1A reg] POP reg [1B ad] POP ad [1C vl24] CALL vl24 [1D reg reg] MOV reg,reg [1E reg vl] MOV reg,vl [1F reg ad] MOV reg,ad [20 ad reg] MOV ad,reg [21 ad vl8] MOV ad,vl8 [22 ad ad] MOV ad,ad [23 reg reg] MOVH reg,reg [24 reg vl8] MOVH reg,vl8 [25 reg ad] MOVH reg,ad [26 ad reg] MOVH ad,reg [27 ad vl16] MOVH ad,vl16 [28 ad ad] MOVH ad,ad [29 reg reg] MOVL reg,reg [2A reg vl8] MOVL reg,vl8 [2B reg ad] MOVL reg,ad [2C ad reg] MOVL ad,reg [2D ad vl16] MOVL ad,vl16 [2E ad ad] MOVL ad,ad [2F reg reg] SWAP reg,reg [30 ad ad] SWAP ad,ad [31 reg ad] SWAP reg,ad [32 reg reg] CMP reg,reg [33 reg vl] CMP reg,vl [34 reg ad] CMP reg,ad [35 ad reg] CMP ad,reg [36 ad vl16] CMP ad,vl16 [37 ad ad] CMP ad,ad [38 reg vl16] ISON reg,vl8 [39 reg reg] ISON reg,reg [3A ad vl16] ISON ad,vl8 [3B ad reg] ISON ad,reg [3C reg reg] ADD reg,reg [3D reg vl8] ADD reg,vl8 [3E reg vl16] ADD reg,vl16 [3F reg ad] ADD reg,ad [40 ad reg] ADD ad,reg [41 ad vl8] ADD ad,vl8 [42 ad vl16] ADD ad,vl16 [43 ad ad] ADD ad,ad [44 reg reg] SUB reg,reg [45 reg vl8] SUB reg,vl8 [46 reg vl16] SUB reg,vl16 [47 reg ad] SUB reg,ad [48 ad reg] SUB ad,reg [49 ad vl8] SUB ad,vl8 [4A ad vl16] SUB ad,vl16 [4B ad ad] SUB ad,ad [4C reg reg] ADC reg,reg [4D reg vl8] ADC reg,vl8 [4E reg vl16] ADC reg,vl16 [4F reg ad] ADC reg,ad [50 ad reg] ADC ad,reg [51 ad vl8] ADC ad,vl8 [52 ad vl16] ADC ad,vl16 [53 ad ad] ADC ad,ad [54 reg reg] SBC reg,reg ; igual a SBB [55 reg vl8] SBC reg,vl8 ; igual a SBB [56 reg vl16] SBC reg,vl16 ; igual a SBB [57 reg ad] SBC reg,ad ; igual a SBB [58 ad reg] SBC ad,reg ; igual a SBB [59 ad vl8] SBC ad,vl8 ; igual a SBB [5A ad vl16] SBC ad,vl16 ; igual a SBB [5B ad ad] SBC ad,ad ; igual a SBB [5C reg reg] MUL reg,reg [5D reg vl8] MUL reg,vl8 [5E reg vl16] MUL reg,vl16 [5F reg ad] MUL reg,ad [60 ad reg] MUL ad,reg [61 ad vl8] MUL ad,vl8 [62 ad vl16] MUL ad,vl16 [63 ad ad] MUL ad,ad [64 reg reg] DIV reg,reg [65 reg vl8] DIV reg,vl8 [66 reg vl16] DIV reg,vl16 [67 reg ad] DIV reg,ad [68 ad reg] DIV ad,reg [69 ad vl8] DIV ad,vl8 [6A ad vl16] DIV ad,vl16 [6B ad ad] DIV ad,ad [6C reg reg] MOD reg,reg [6D reg vl8] MOD reg,vl8 [6E reg vl16] MOD reg,vl16 [6F reg ad] MOD reg,ad [70 ad reg] MOD ad,reg [71 ad vl8] MOD ad,vl8 [72 ad vl16] MOD ad,vl16 [73 ad ad] MOD ad,ad [74 reg] INC reg [75 ad] INC ad [76 reg] DEC reg [77 ad] DEC ad [78 reg] SHL reg [79 ad] SHL ad [7A reg] SHR reg [7B ad] SHR ad [7C reg vl8] SHL reg,vl8 [7D ad vl8] SHL ad,vl8 [7E reg vl8] SHR reg,vl8 [7F ad vl8] SHR ad,vl8 [80 vl8] FOR vl8 [81 reg] FOR reg [82 vl16] FOR vl16 [83 ad] FOR ad [84] LOOPE [85] LOOPL [86] LOOPG [87] LOOPC [88] LOOPB [89] LOOPO [8A] LOOPN [8B] LOOP [8C vl8] JMP vl8 ; JUMP relativo (vale para os demais) [8D vl24] JMP vl24 ; JUMP absoluto (vale para os demais) [8E vl8] JE vl8 [8F vl24] JNE vl24 [90 vl8] JL vl8 [91 vl24] JNL vl24 [92 vl8] JG vl8 [93 vl24] JNG vl24 [94 vl8] JC vl8 [95 vl24] JNC vl24 [96 vl8] JT vl8 ; igual a JB [97 vl24] JF vl24 ; igual a JNB [98 vl8] JO vl8 [99 vl24] JNO vl24 [9A vl8] JN vl8 [9B vl24] JNN vl24 [9C reg vl16] RND reg,vl16 [9D ad vl16] REFID ad,vl16 [9E ad reg] REFID ad,reg [9F ad vl16] REFPOSX ad,vl16 [A0 ad reg] REFPOSX ad,reg [A1 ad vl16] REFPOSY ad,vl16 [A2 ad reg] REFPOSY ad,reg [A3 ad vl16] REFSTATE ad,vl16 [A4 ad reg] REFSTATE ad,reg [A5 ad vl8] REFFRAME ad,vl16 [A6 ad reg] REFFRAME ad,reg [A7 ad reg] GETPOSX ad,reg [A8 ad reg] GETPOSY ad,reg [A9 ad reg] GETSTATE ad,reg [AA ad reg] GETFRAME ad,reg [AB ad] DRAW ad [AC reg] DRAW reg [AD ad vl8] GLEFT ad,vl8 [AE ad ad] GLEFT ad,ad [AF reg vl8] GLEFT reg,vl8 [B0 ad vl8] GRIGHT ad,vl8 [B1 ad ad] GRIGHT ad,ad [B2 reg vl8] GRIGHT reg,vl8 [B3 ad vl8] GUP ad,vl8 [B4 ad ad] GUP ad,ad [B5 reg vl8] GUP reg,vl8 [B6 ad vl8] GDOWN ad,vl8 [B7 ad ad] GDOWN ad,ad [B8 reg vl8] GDOWN reg,vl8 [B9 ad vl8] MLEFT ad,vl8 [BA ad ad] MLEFT ad,ad [BB reg vl8] MLEFT reg,vl8 [BC ad vl8] MRIGHT ad,vl8 [BD ad ad] MRIGHT ad,ad [BE reg vl8] MRIGHT reg,vl8 [BF ad vl8] MUP ad,vl8 [C0 ad ad] MUP ad,ad [C1 reg vl8] MUP reg,vl8 [C2 ad vl8] MDOWN ad,vl8 [C3 ad ad] MDOWN ad,ad [C4 reg vl8] MDOWN reg,vl8 [C5 reg] NOT reg [C6 ad] NOT ad [C7 reg] NEG reg [C8 ad] NEG ad [C9 reg reg] AND reg,reg [CA reg ad] AND reg,ad [CB reg vl] AND reg,vl [CC ad reg] AND ad,reg [CD ad ad] AND ad,ad [CE ad vl16] AND ad,vl16 [CF reg reg] OR reg,reg [D0 reg ad] OR reg,ad [D1 reg vl] OR reg,vl [D2 ad reg] OR ad,reg [D3 ad ad] OR ad,ad [D4 ad vl16] OR ad,vl16 [D5 reg reg] XOR reg,reg [D6 reg ad] XOR reg,ad [D7 reg vl] XOR reg,vl [D8 ad reg] XOR ad,reg [D9 ad ad] XOR ad,ad [DA ad vl16] XOR ad,vl16 [DB ad vl8] ROTSP ad,vl8 [DC ad reg] ROTSP ad,reg [DD ad ad] ROTSP ad,ad [DE reg] RETID reg [DF ad] RETID ad